Regviz

Espressif Systems /ESP32-C6 /PCR /CTRL_CLK_OUT_EN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CTRL_CLK_OUT_EN

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-C6/PCR/CTRL_CLK_OUT_EN#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLK20_OEN)CLK20_OEN 0 (CLK22_OEN)CLK22_OEN 0 (CLK44_OEN)CLK44_OEN 0 (CLK_BB_OEN)CLK_BB_OEN 0 (CLK80_OEN)CLK80_OEN 0 (CLK160_OEN)CLK160_OEN 0 (CLK_320M_OEN)CLK_320M_OEN 0 (CLK_ADC_INF_OEN)CLK_ADC_INF_OEN 0 (CLK_DAC_CPU_OEN)CLK_DAC_CPU_OEN 0 (CLK40X_BB_OEN)CLK40X_BB_OEN 0 (CLK_XTAL_OEN)CLK_XTAL_OEN

Description

CLK_OUT_EN configuration register

Fields

CLK20_OEN

Set 1 to enable 20m clock
CLK22_OEN

Set 1 to enable 22m clock
CLK44_OEN

Set 1 to enable 44m clock
CLK_BB_OEN

Set 1 to enable bb clock
CLK80_OEN

Set 1 to enable 80m clock
CLK160_OEN

Set 1 to enable 160m clock
CLK_320M_OEN

Set 1 to enable 320m clock
CLK_ADC_INF_OEN

Reserved
CLK_DAC_CPU_OEN

Reserved
CLK40X_BB_OEN

Set 1 to enable 40x_bb clock
CLK_XTAL_OEN

Set 1 to enable xtal clock

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/espressif/svd